The present invention relates to integrated circuit packages and more particularly to chip-scale packages (CSPs) incorporating interposers to confine movement of material over of a substrate upon which devices of the CSP are mounted.
Typically the final process in the manufacture of an integrated circuit, packaging of the integrated circuit is attendant with several challenges that may prevent obtaining the intended operational characteristics of the integrated circuit. Packaging of an integrated circuit involves mechanically mounting the integrated circuit to the package and providing electrical connections between the integrated circuit and conductors of the package, typically called pins, to facilitate signal and power transmission between the integrated circuits and circuits outside of the package.
A common packaging technology is known as “flip chip” and includes mechanically and electrically coupling an integrated circuit to a substrate, which is capable of producing a chip package having a high pin count while providing a modest package area. A common type of flip chip package structure includes the so-called “flip chip ball grid array”. In a flip chip ball grid array package an array of bonding pads is present on an active surface of the integrated circuit and conductive bumps are formed over the bonding pads. Thereafter, the chip is flipped over such that the contacts on a substrate are aligned with the respective bumps on the chip. A reflow process is commonly employed when fabricating flip chip packages. The reflow process allows allow the bumps on the surface to melt and bond with corresponding contacts on the substrate. Thus, the substrate and the chip are electrically and mechanically connected via the bumps so that the chip is able to communicate with an external device through the internal circuits inside the substrate. However, the differences in the coefficient of thermally expansion between the differing materials employed to fabricate the flip chip has proven problematic.
A need exist, therefore, to provide improved flip chip packaging techniques.